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Overclock Matrox G450 with by means of change of contents PINS 5.1. Help please!!!

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  • Overclock Matrox G450 with by means of change of contents PINS 5.1. Help please!!!

    Dear Experts!
    Only you know structure PINS 5.1.
    I am engaged overclocking Matrox G450PCI.
    PINS 5.1 by mine videocard:

    ;MGA Bios Programming Utility v2.28.000d
    ;(C) Matrox Graphics Inc. (2001)
    ;
    Fill: 0 127 0xFF
    ;Matrox G450 PCI
    ;VGA Enabled - BIOS V2.0

    ;loc size val desc
    0 2 0x412e ; "PIN"
    2 1 0x80 ; Struct length
    3 1 0xff
    4 2 0x0501
    6 2 0x470
    8 2 0x0006
    10 2 0x0331
    12 16 'KDV06139'
    28 6 '305'
    ;34 2 0x3EB3 ;
    36 1 75 ; Max SClk VCO freq/8
    37 1 75 ; Max VClk VCO freq/8
    38 1 75 ; Max PClk VCO freq/8
    39 1 90 ; Max CRTC1 PClk/4 8bpp
    40 1 90 ; Max CRTC1 PClk/4 16bpp
    41 1 90 ; Max CRTC1 PClk/4 24bpp
    42 1 90 ; Max CRTC1 PClk/4 32bpp
    43 1 58 ; Max CRTC2 PClk/4 16bpp
    44 1 58 ; Max CRTC2 PClk/4 32bpp
    45 1 0xff ; VGA1 PClk
    46 1 0xff ; VGA2 PClk
    47 1 28 ; Max PClk Plink/4
    48 4 0x404a1160
    52 4 0x0000ac00
    56 1 94 ; VGA SClk/4 - !!!
    57 1 94 ; VGA VClk/4 - !!!
    58 4 0x0090a409 ; VGA OP3
    62 4 0x0c81462b ; VGA MCTLWTST
    66 4 0x80000004 ; VGA MEMMISC
    70 4 0x01001123 ; VGA MEMRDBK
    74 1 94 ; SH SClk/4 - !!!
    75 1 94 ; SH VClk/4 - !!!
    76 4 0x0090a409 ; SH OP3
    80 4 0x0c81462b ; SH MCTLWTST
    84 4 0x80000004 ; SH MEMMISC
    88 4 0x01001123 ; SH MEMRDBK
    92 1 94 ; DH SClk/4 - !!!
    93 1 94 ; DH VClk/4 - !!!
    94 4 0x0090a409 ; DH OP3
    98 4 0x0c81462b ; DH MCTLWTST
    102 4 0x80000004 ; DH MEMMISC
    106 4 0x01001123 ; DH MEMRDBK
    110 4 0xe7fffffe ; Factory Options
    114 2 0xffa1 ; MemConfig
    116 2 0x5911 ; Display Info
    118 1 90 ; Max PClk1/4
    119 1 90 ; Max PClk2/4
    120 1 0xff ; Reserved
    121 1 32 ; Min SClk VCO
    122 1 32 ; Min VClk VCO
    123 1 32 ; Min PClk VCO
    124 1 51 ; Max DH PClk1 32bpp/4
    125 1 51 ; Max DH PClk2 32bpp/4
    126 1 255 ; Reserved/PARrev
    ;127 1 0xD6 ; checksum

    :filetype CONDOR
    :PCBinfo 7003-03
    :SubsystemVendorId 0x0d41102b

    I have changed SClk with 288MHz on 376MHz.
    As a result of frequency: GClk=WClk=150MHz, MClk=188MHz.
    Memory frequency with factor 1/2,
    and GPU with factor 2/5 from frequency of the system generator.
    However PLL can form on the output of frequency and with
    other factors: 1/3 2/5 4/9 1/2 2/3 1.
    Prompt please where the factors PLL in PINS 5.1 are written down and what
    values correspond to all ruler of multipliers from 1/3 up to 1.
    Very much to you I shall be grateful.

    Roman.

  • #2
    wrong forum... klink
    "Be who you are and say what you feel, because those who mind don't matter, and those who matter don't mind." -- Dr. Seuss

    "Always do good. It will gratify some and astonish the rest." ~Mark Twain

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