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Extremely interesting article in Technology Review recently on asynchronous logic chips.
Features;
NO clock to time events etc. Instead of the registers being read at regular intervals handshake signals communicate the status of a calculation and the rediness of a logic unit to do another.
3 times faster than clocked chips.
1/2 the power used as they only draw power when actually doing calculations.
Low EMF emissions.
Harder to hack.
Philips has a pager NOW that uses asynch chips and have built the infrastructure for asynch design.
Other companies like Intel etc. have been slow to do the full switch, opting instead to included small asynch features in chips like the P4 for power saving, but using conventional archetectures in the main portion of the chip.
IMHO whoever is first out of the box with a fully asynchronous CPU is going to be a BIG winner.
Dr. Mordrid
Features;
NO clock to time events etc. Instead of the registers being read at regular intervals handshake signals communicate the status of a calculation and the rediness of a logic unit to do another.
3 times faster than clocked chips.
1/2 the power used as they only draw power when actually doing calculations.
Low EMF emissions.
Harder to hack.
Philips has a pager NOW that uses asynch chips and have built the infrastructure for asynch design.
Other companies like Intel etc. have been slow to do the full switch, opting instead to included small asynch features in chips like the P4 for power saving, but using conventional archetectures in the main portion of the chip.
IMHO whoever is first out of the box with a fully asynchronous CPU is going to be a BIG winner.
Dr. Mordrid
) work on something for years then some snotnose comes out of MIT or Stanford at 22 and up goes the balloon.....
)
<FONT SIZE=4>...Got DARTH INSIDE!!!...YOU WILL!!!<SUP>tm</SUP> ...
). BTW it was only available for the Amiga as 50MHz version, but still gave the early PPCs some tough competition when used in ShapeShifter (a MacEMU).
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