PCIList 1.30 now available

[xortam]

See http://www.entechtaiwan.com/cgi-bin/...es/pcilist.exe

[JoeDredd]

Thanks Dude

[xortam]

[Himself]

I don't seem to have AGP pipeline turned on for the motherboard, but it's enabled for the G400, I have always wondered about that since my Riva 128 days. Anybody else notice that on their system?

[Heed]

Himself: I noticed the same thing in the past, but in this version if you look at the "report" at the bottom of the screen it should say that it is enabled (mine does). Anyone notice that the g-400 doesn't support "fast-writes"? Anyone know what it is and what it does? Also, can anyone explain the difference between "shadowing" and "cacheable" options in BIOS? I thought they were essentially the same thing, but I'm not so sure now. Should I turn off the "video bios cacheable" and the "video RAM chaceable" for my g-400 in addition to the "video BIOS shadowing"?

Ooops, just checked and I was looking at "Sideband addressing"; not "pipeline", but Ashley seems to have cleared that up.

Cheers,
Heed.

[This message has been edited by Heed (edited 10 November 1999).]

[Ashley]

The system board is an AGP master - it can accept pipelined requests from an AGP target device (the graphic card).

The graphics card is an AGP target - it can queue requests to the master (the system board).

In other words, because the system board is a master, it never queues requests to other devices, so for a system board the pipeline checkbox in PCIlist will never be checked.

Does that make sense?

[Kruzin]

Well, sounds like a good explanation....now can you explain why this new version of PCI list shows my "AGP pipeline - 32" box checked (enabled) for my G400?

[Heed]

Kruzin: I know you're asking Ashley or someone who knows why, but the old version (1.12, I think) always showed a check for my g-400; just not for my mainboard. You're saying yours did not?

Cheers,
Heed.

[Kruzin]

OK...I was confused
Ashley was saying it should be checked for the G400(target)- and it is...and it should NOT be checked for the Mobo(master)- which it isn't....so everything is correct here

[Ashley]

That's it. Note that the target/master appellations are sometimes reversed, depending on what you're reading, but so long as you recognize the distinction (one makes requests, the other gets them), it doesn't really matter. In Intel's own software, they refer to the motherboard as the "master", and PCIlist follows that.
http://www.entechtaiwan.com/images/inteldp.gif

[Himself]

Ashley,

Thanks for the explanation, it doesn't really answer why there is a box for it in the gui though if it's never in use. Perhaps some context help with what you just told us would be a good idea.

[Ashley]

The checkbox is there simply because the flag exists in the device registers. If you hover the cursor over the checkbox for a second you'll find a tool tip that qualifies the flag as applicable to targets only, but you are, of course, correct to point out that the meaning is less than clear...

[James]

Thanks Ashley for the neat tidbit.

[ALBPM]

Thanks Ashley!!!! This version gives a lot more info.

Paul

[Snake-Eyes]

Does anyone have an answer to Heed's question about fast writes? I noticed that too when I ran PCIList on my system.

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Ace